retro-silicon

Components

memory/bram

Block RAM behind memory/sdram's byte port

Portable Sim: passing (3 passed). Used by Nintendo Entertainment System. Source.

BoardStateRun
Sipeed Tang Console 138Kverified2026-10-25, at f2536e6
TUL PYNQ-Z2verified2026-10-28, at ac84cec

Verified: the latest run on that board of a system using it passed every test, and the component hasn't changed since. Stale: it has changed since that run.

README

2^AW bytes of block RAM behind memory/sdram’s byte port, for a board whose own memory a system can’t use yet, such as the Tang Console 138K’s DDR3. Every access takes one clock. Addresses wrap at 2^AW, so a wider port mirrors it.

Module bram_mem.

Ports

PortDirWidthMeaning
clk, rstin1Clock; synchronous reset (the contents stay)
req, we, addr, wdatain1, 1, IW, 8An access, held until ack; req may still be high while ack is
ack, rdataout1, 8One-clock pulse a clock after req; read data with it
readyout1Always high: block RAM needs no power-up sequence

Parameters

ParameterDefaultMeaning
AW18Bytes: 2^AW (256 KB)
IW23The port’s address width; bits above AW are ignored

Status

Sim test (AW = 10, IW = 12): 40,000 random reads and writes, through the mirror, against a byte array, each acked in one clock, with req left high during the ack. In systems/nes (nes_bram) it holds PRG ROM on the Tang Console 138K.